readily available 3.58-MHz color-TV crystal and frequency divider to generate 1.789773 MHz, which is close enough for the 1861 chip to perform properly.
The 1861 chip uses the same clock as the 1802 µP chip to trigger internal counters to provide the TV-like composite sync at pin 6. The graphics display is directly refreshed from the memory 60 times each second, accomplished by an interrupt request sent to the 1802 at the same rate.
When the 1802 receives the interrupt request, it temporarily stops the program it is executing and immediately branches to the interrupt routine previously stored in memory. This branch occurs when P is automatically set to 1 and X is set to 2. The interrupt routine program counter is always R1, which must be set to the address of the interrupt routine before the 1861 is activated and starts sending interrupts to the 1802. A pulse from NO is sent to pin 10 of the 1861, permitting this chip to start sending interrupts. A 69 instruction can be used to generate the 1861 activation pulse. The 1861 is always turned off when the Elf is stopped with the RUN switch down.
In the program shown in Table I, R1 is set to the address of the interrupt routine at M(0011), R2 is set to the address of the work area (or stack) used subsequently for byte storage, R3 is set to the main program starting at M(002D), and setting P=3 causes a branch to M(002D) with R3 as the program counter. The main program permits entry of the bytes at any time via the Elf's toggle switches. This permits you to see what is happening to the CRT screen as memory bytes are changed. The program loops on itself until an interrupt signal is generated by the 1861, activated by the 69 instruction at M(002E).
Exactly 29 machine cycles after the initiation of the interrupt routine, the 1861 requests eight sequential memory bytes by putting down the DMA-OUT (pin-2) request line for eight bytes (eight machine cycles). This automatically causes eight memory bytes, addressed by R0, to be sequentially fetched and transferred to the 1861 via the data bus. Note that the C4 instructions at M(0015) are special no-op instructions that re-[45]
TABLE II -- SPACESHIP PROGRAM
| M | Byte Sequence |
|---|---|
| 0040 | 00 00 00 00 00 00 00 00 |
| 0048 | 00 00 00 00 00 00 00 00 |
| 0050 | 7B DE DB DE 00 00 00 00 |
| 0058 | 4A 50 DA 52 00 00 00 00 |
| 0060 | 42 5E AB D0 00 00 00 00 |
| 0068 | 4A 42 8A 52 00 00 00 00 |
| 0070 | 7B DE 8A 5E 00 00 00 00 |
| 0078 | 00 00 00 00 00 00 00 00 |
| 0080 | 00 00 00 00 00 00 07 E0 |
| 0088 | 00 00 00 00 FF FF FF FF |
| 0090 | 00 06 00 01 00 00 00 01 |
| 0098 | 00 7F E0 01 00 00 00 02 |
| 00A0 | 7F C0 3F E0 FC FF FF FE |
| 00A8 | 40 0F 00 10 04 80 00 00 |
| 00B0 | 7F C0 3F E0 04 80 00 00 |
| 00B8 | 00 3F D0 40 04 80 00 00 |
| 00C0 | 00 0F 08 20 04 80 7A 1E |
| 00C8 | 00 00 07 90 04 80 42 10 |
| 00D0 | 00 00 18 7F FC F0 72 1C |
| 00D8 | 00 00 30 00 00 10 42 10 |
| 00E0 | 00 00 73 FC 00 10 7B D0 |
| 00E8 | 00 00 30 00 3F F0 00 00 |
| 00F0 | 00 00 18 0F C0 00 00 00 |
| 00F8 | 00 00 07 F0 00 00 00 00 |